In accordance with U.S. Patent Law Section 119(a), the present application claims priority upon Japanese Patent Application No. 2003-330107 filed on Sep. 22, 2003, the entire disclosure of which is herein incorporated by reference.
The present invention relates to a layout configuration for lands (land pattern configuration), which is formed on a printed circuit board for mounting ICs and other semiconductor devices onto this printed circuit board. More particularly, the present invention relates to an improvement for selectively mounting a plurality of types of semiconductor devices (IC chips and so forth) onto the same printed circuit board, while saving space. Furthermore, in this specification, the respective contact pin terminal areas formed on a printed circuit board (one terminal area for connecting one contact pin) are called “lands”, and arrays, which are aggregates of these lands, are called “land patterns”.
Conventionally, various types of ICs, such as power ICs and switching ICs, have been mounted onto a printed circuit board for use in a LNB (Low Noise Block Down Converter), which is connected, for example, to a satellite transceiving antenna. For example, JP H6-140814A and JP H6-188656A disclose constitutions in which a microwave IC is mounted onto a LNB printed circuit board.
Often, there are a plurality of types of candidates for ICs to be employed in the development stage of this type of printed circuit board and semiconductor device, and the procedure adopted calls for deciding the ICs to be employed (to be used as a product) after subjecting these ICs to evaluation testing. Further, in most cases, as a rule, the least expensive IC is employed in an attempt to hold down costs, but when the performance of this IC is unsatisfactory, there are also cases in which another candidate IC or the same kind of IC as in the past is used.
Thus, in the development stage for deciding the ICs to be mounted onto a printed circuit board, it is necessary to selectively mount a plurality of types of ICs (ICs for which the numbers of contact pins differ) onto a printed circuit board. For this reason, in the past it was necessary to prepare a plurality of types of printed circuit boards corresponding to the respective ICs (candidate ICs). Further, in order to enable selective mounting of a plurality of types of ICs onto the same printed circuit board, there was also the approach of individually disposing the mounting areas of a number of ICs on a single printed circuit board, and forming land patterns that correspond to the respective contact pins of each IC.
However, when a printed circuit board is prepared for each candidate IC as explained hereinabove, it is necessary to also manufacture printed circuit boards that ultimately are not used, leading to increased development costs.
Also, when individual land patterns corresponding to the contact pins of each IC are formed in advance on one printed circuit board, this can readily be achieved if the printed circuit board is relatively large, but in line with making semiconductor products smaller in recent years, printed circuit boards have also had to be made smaller, making it impossible for the individual land patterns of each IC to be formed in advance on this small printed circuit board.
The present invention was devised with this point in mind, and has as an object the provision of a land pattern configuration that makes selectively mounting a plurality of types of semiconductor devices onto the same printed circuit board achievable in as little space as possible.